This application incorporates by reference Taiwanese application Serial No. 90118812, Filed Aug. 1, 2001.
1. Field of the Invention
The invention relates in general to a package for integrated circuits and more particularly to a super low profile package with stacked dies.
2. Description of the Related Art
The technology of integrated circuit (IC) has been usually applied in the various electronic products. The current trend of the electronic products is towards the smaller, thinner, and lighter. Therefore, one important research of IC design focuses on how to improve and minimize the size of the IC package so as to fit in with those smaller electronic products.
Since the integrated circuit (IC) design becomes more and more delicate and complicated, the package with double dies has been commonly adopted for meeting the requirement of the IC design. Typically, the packages could be divided into xe2x80x9ccavity upxe2x80x9d packages and xe2x80x9ccavity downxe2x80x9d packages in accordance with the way of die attachment. Please refer to FIG. 1, which is a cross-sectional view of a conventional cavity-up package with double dies. The die 102 is attached to the top surface 106 of the substrate 101 while the die 104 is attached on the die 102 by a thin layer of thermally conductive epoxy. The dies 102 and 104 are electrically connected to the substrate 101 by the wires 114 and 116, respectively. The molding compound 110 is formed over the substrate 101 so as to encapsulate the dies 102 and 104. A number of solder balls 112 are attached to the bottom surface 108 of the substrate 101 for electrically connecting the package 100 to an external printed circuit board (PCB) (not shown in FIG. 1).
FIG. 2 is a cross-sectional view of a conventional cavity-down package with double dies. The package 200 with double dies of FIG. 2 is constructed in accordance with the single-die package design disclosed in U.S. Pat. No. 5,397,921, entitled xe2x80x9cTAB Grid Arrayxe2x80x9d, issued Mar. 14, 1995 to Advanced Semiconductor Assembly Technology. The substrate 201 of the package 200 comprises the dielectric layers 201A and 201C, and the pad (conductor) layer 201B. The substrate 201 further has a cavity, through the dielectric layers 201A, 201B and the pad layer 201B, for placing the die 202. In addition, there is a heat spreader 218 attached to the substrate 201 by a thin film layer of adhesive 220. Also, the heat spreader 218 has a cavity for placing the dies 202 and 204, while the die 204 is attached to the heat spreader 218 and the die 202 is attached to the die 204 both by a thin layer of thermally conductive epoxy. Simultaneously, the dies 202 and 204 are wire-bonded to the pad layer 201B for achieving the electrically connection. Furthermore, the cavity is filled with an encapsulation material (molding compound) 210 for encapsulating the dies 202 and 204. The numerous solder balls 212 are attached to the dielectric layer 201C of the substrate 201 for electrically connecting the integrated circuit to metallic traces on an external PCB (not shown in FIG. 2).
According to the description above, the overall thickness of the package 100 in FIG. 1 is equal to the sum of the thickness of the molding compound 110, the thickness of the substrate 101, and the height of the solder ball 112, wherein the thickness of the molding compound 110 is positively related to the thickness of the dies 102 and 104, and the loop height of the wire 116. Similarly, the overall thickness of the package 200 in FIG. 2 is determined by the thickness of the heat spreader 218, the thickness of the substrate 201, and the height of the solder ball 212, wherein the thickness of the heat spreader 218 is positively related to the thickness of the dies 202 and 204. Since the thickness of the dies 102, 104, 202, and 204 directly relate to the overall thickness (profile) of the packages 100 and 200, the packages 100 and 200 encapsulated with the over-thick dies 102, 104, 202, and 204 can not well fit in with the small and delicate electronic products.
FIG. 3 is a cross-sectional view of another conventional package with double dies. The package 300 with double dies in FIG. 3 is constructed in accordance with the single-die package design disclosed in U.S. Pat. No. 5,696,666, entitled xe2x80x9cLow Profile Exposed Die Chip Carrier Packagexe2x80x9d, issued Dec. 9, 1997 to Motorola, Inc. The substrate 301 of the package 300 in FIG. 3 has an open-through cavity 320 for placing the die 302. The die 304 is mounted on the die 302 by a thin film of the conductive epoxy. The dies 302 and 304 are electrically connected to the substrate 301 by the wires 314 and 316, respectively. After wire bonding, an encapsulation material (encapsulant or molding compound) is applied over the top surface 306 of the substrate 301, thereby encapsulates the dies 302 and 304. Also, the solder balls 312 are attached to the bottom surface 308 of the substrate 301.
FIG. 4Axcx9cFIG. 4D show the process of manufacturing the package of FIG. 3. First, a cavity 320 is formed through the substrate 301, and the bottom surface 308 of the substrate 301 is temporarily taped by a tape 432 in order to seal one side of the cavity 320, as shown in FIG. 4A.
Next, the die 302 is seated in the cavity 302 and carried by the tape 432, as shown in FIG. 4B. In other words, the tape 432 provides the mechanical support for the die 302. Then, the die 304 is attached on the top of the die 302 by a conductive epoxy. The dies 302 and 304 are respectively wire-bonded to the substrate 301 through the wires 314 and 316. After wire bonding, the encapsulation material, such as a plastic resin, is applied in the peripheral of the dies 302 and 304 in place, so that the dies 302 and 304 are encapsulated and well held in the cavity 320.
Since the die 302 is well fixed in the cavity 320 after encapsulating process, there is no need for using the tape 432 as a carrier of the die 302. So, the de-taping procedure, which is the removal of the tape 432, can be performed as shown in FIG. 4C. Accordingly, the back surface 302A of the die 302 is exposed to the atmosphere.
After de-taping, the solder ball attachment is performed as shown in FIG. 4D. Numerous solder balls 312 are attached to the bottom surface 308 of the substrate 301 as an array format, and the package 300 in FIG. 3 is thereby obtained in accordance with the forgoing process.
Comparatively speaking, the encapsulation material 310 of the package 300 in FIG. 3 is thinner than the molding compound 110 of the package 100 in FIG. 1, which results from the substrate 301 having a capacity (cavity 302) for the die 302. So, the overall thickness of the package 300 is smaller than that of the package 100. However, the integration of the taping and de-taping procedures makes the process of manufacturing package 300 more complicate, which thereby decreases the production efficiency and even increases the prime cost greatly.
It is therefore an object of the invention to provide a super low profile package with stacked dies and the method of manufacturing the same. The package of the invention possesses small size, thin profile, and good efficiency of heat dissipation. In addition, the process of manufacturing the package of the invention is simplified by eliminating the conventional procedures of taping and de-taping, so that the prime cost is significantly reduced.
The invention achieves the above-identified objects by providing a super low profile package with stacked dies, comprising: a substrate, a heat spreader, a first die, a second die, a molding compound, and a number of solder balls. The substrate has a cavity, a top surface and a bottom surface opposite to the top surface. The heat spreader is connected to the bottom surface of the substrate. A portion of the heat spreader opposite to the cavity serves as a die pad. The first die seated in the cavity is attached to the die pad, and electrically connected to the substrate by the wire. The second die seated in the cavity is attached to the first die, and also electrically connected to the substrate by the wire. The molding compound fills the cavity and encapsulates the first die, the second die, the heat spreader, and part of the bottom surface of the substrate. Additionally, a number of solder balls are attached to the bottom surface of the substrate.